JRF Hiring for the DST-SERB Core Research Grant Project

24, Feb 2020

24, Feb 2020

Applications are invited from suitable candidates for a Research Position to work at DA-IICT, Gandhinagar on a Science and Engineering Research Board (SERB) sponsored Core Research Grant project financed by the Department of Science and Technology (DST, GoI), India. The project details, requisite qualification & experience etc. are given below:

Title of the Project: “Design of a Novel and Ultra-Low Power All Digital Front End Acquisition with Configurable Time to Digital Converter and Integrated Application Specific Processor for Detection of Myocardial Infarctions”

Position and Fellowship Junior Research Fellow (JRF) – 1 post
Rs. 31,000/- p.m. + 24% HRA
Essential Qualifications
  • M.Tech (Electronics & Communication/ ICT) or Equivalent with 60% marks and with GATE qualification.          OR
  • B.E./B.Tech. in Electronics and Communication Engineering/ ICT or Equivalent with 60% marks and with GATE qualification. OR
  • M.Sc in Electronics with 60% marks and with valid CSIR-UGC NET qualification and 2 years of Industrial/Research experience will be given preference.
Desirable Qualifications 
  • Understanding of basics analog circuits and digital circuits
  • Experience in Cadence ICFB, PCB design, Circuit design
Period of Appointment: This post is for duration of 3 years. Appointment will be made initially for 1 year and further extendable subject to satisfactory performance. It would, therefore, not confer any right for any candidate for claiming extension or absorption in DA-IICT. However, the selected candidate will be encouraged to apply for the PhD program of DA-IICT as per the available guidelines.
Job Description
  1. Design and implement a novel and fully digital electrocardiogram (ECG) signal front end (FE) acquisition system in the form of an Application Specific Integrated Circuit (ASIC).
  2. Design and implement an application specific Configurable Time to Digital Converter to be integrated with the Front End Circuit
  3. Design, implement and integrate a dedicated DSP for Digital Domain Processing operable at few KHz useful for IHD and MI classification specifically targeted for ExG  signals where the requirement of the sampling rate is typically a few hundreds of KHz with the FE circuit.

How to Apply: The interested candidates must send the Curriculum Vitae with complete qualification and experience details latest by March 20, 2020 through an e-mail to Prof. (Dr) Biswajit Mishra at biswajit_mishra@daiict.ac.in

Please write “Application for JRF position for ULP_FE_ASIC DA-IICT” in subject line of the email.

Candidates will be shortlisted for interview based on their CV, qualifications and experience. Only shortlisted candidates will be called for interview and the candidates are required to attend at their own expenses, no TA/DA will be provided.

Tentative date of Interview: March 27, 2020.

Expected start date: First week of April, 2020 or sooner.